Pooran Singh
Assistant Professor
pooran.singh@mahindrauniversity.edu.in
Dr. Pooran Singh is an Assistant Professor in the Electrical and Electronics Engineering Department at Mahindra University École Centrale School of Engineering.
Dr. Pooran did his Ph.D. from the Department of Electrical Engineering, IIT Indore. He is a Fulbright-Nehru Doctoral Fellow (2014-15). Under Fulbright Fellowship he was associated with the Department Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta USA for a period of one year.
Prior to joining MU, he was an Analog Design Engineer (SRAM Design) at Intel Microelectronics, Penang, Malaysia, his primary work included designing SRAM circuits, Pre-layout SRAM design and analysis of its various design parameters i.e. read margin/write margin, critical path, read/write performance, dynamic and leakage power at different PVT values for Intel’s 7nm and 10nm FPGAs.
2018
- 2018 Doctor of Philosophy(VLSI Design), Department of Electrical Engineering, Indian Institute of Technology Indore (IIT Indore), M. P., India
Thesis Title: Ultra low power, High-stability robust SRAM design for FPGA, Image Processing, and IoT Applications
2010
- 2010 Master of Technology(VLSI Design), Department of Electrical Engineering, ABV-Indian Institute of Information Technology & Management Gwalior, M. P., India
2007
- 2007 Bachelor of Engineering, Electronics & Communication (ECE), RGPV University, Bhopal (M. P.)
2020 - Present
- 03/2020 – Present Assistant Professor, Electrical and Electronics Engineering, Mahindra University, Hyderabad, Telangana, India
2017 - 2020
- 11/2017 – 02/2020 Analog Design Engineer (SRAM Design), Intel Corporation, Penang, Malaysia
2012 - 2017
- 01/2012 – 10/2017 Teaching Assistant, IIT Indore, M. P., India
2010 - 2011
- 10/2010 – 08/2011 Electronics Engineer, Baharat Electronics Ltd, Pune, MH, India
Books
Energy Efficient and Reliable Embedded Nanoscale SRAM Design
Publication Date: October 2023.
Patent
Patent No. 370308
- Pooran Singh, S. K. Vishvakarma, “Low leakage-high stability differential positive feedback controlled 10T (DPFC10T) SRAM cell” IN Patent No. 370308, 25th June 2021.
List of Selected Publications:
2023
- Bhat SM, Ahmed S, Bahar AN, Wahid KA, Otsuki A, Singh P. Design of Cost-Efficient SRAM Cell in Quantum Dot Cellular Automata Technology. Electronics. 2023; 12(2):367. dio: https://doi.org/10.3390/electronics12020367
- Akshat Raj Patil, Abin TS, Pooran Singh, “Assist Techniques for Radiation Hardened SRAM in Space Applications,” 9th IEEE International Symposium on Smart Electronic Systems (IEEE – iSES), 18-20 Dec. 2023, Nirma University, Ahmedabad, Gujrat, India.
- Akshat Raj Patil, Abin TS, Pooran Singh, “Overall Performance Improvement of Radiation Hardened SRAM cells through Assist Techniques,” 20th India Council International Conference (INDICON) 2023, 14-17 Dec. 2023, Hyderabad, India.
- Soha Maqbool Bhat, Pooran Singh, Ramakant Yadav, Shiromani Balmukund Rahi, Billel Smaani, Abhishek Kumar Upadhyay, Young Suh Song, “Technical Demands of Low-Power Electronics,” Book Chapter on Negative Capacitance Field Effect Transistors: Physics, Design, Modeling and Applications (1st ed.), CRC Press, October 2023. https://doi.org/10.1201/9781003373391
2021
- S Kavitha, Pooran Singh, AP Shah, SK Vishwakarma, BS Reniwal, “"Energy Efficient, Hamming Code Technique for Error Detection/Correction Using In-Memory Computation," 2021 25th International Symposium on VLSI Design and Test (VDAT), 2021, pp. 1-4, doi: 10.1109/VDAT53777.2021.9601068.
- Kunal Swamirao Jadhav, Kousik Nandury, Mythri Komuravelli, Pooran Singh, K C Bulusu, “Smart Farming Architecture with Water Management System,” Conclave on Fabless and Fab Semiconductor Ecosystem (FFSE), MPVS-2021, IIT Indore, 23rd – 25th December 2021.
- Kunal Swamirao Jadhav, Kousik Nandury, Mythri Komuravelli, Pooran Singh, K C Bulusu, “5G based Smart Farming Architecture with Water Management System,” National Conference on New Age Technologies, MPVS-2021, IIT Indore, 23rd – 25th December 2021.
2019
- B. Singh Reniwal, Vikas Vijayvargiya, Pooran Singh, Nandkishor Yadav, Santosh Kumar Vishvakarma and Devesh Dwivedi, “An Auto Calibrated Sense Amplifier with Offset Prediction Approach for Energy Efficient SRAM,” Circuits, Systems & Signal Processing (CSSP), Springer, vol. 38, no. 4, pp. 1482–1505, Aug. 2019.
- V. Sharma, M. Gopal, Pooran Singh, S. K. Vishvakarma and S. Chouhan, “A Robust, Ultra Low-Power, Data-Dependent-Power-Supplied 11T SRAM Cell with Expanded Read/Write Stabilities for Internet-of-Things Applications,” Analog Integrated Circuits and Signal Processing, Springer, vol. 98, no. 2, pp. 331–346, Feb. 2019.
2018
- Bhupendra Singh Reniwal, Vikas Vijayvargiya, Pooran Singh, Nandkishor Yadav, Santosh Kumar Vishvakarma and Devesh Dwivedi, "An Auto Calibrated Sense Amplifier with Offset Prediction Approach for Energy Efficient SRAM, "Circuits, Systems & Signal Processing (CSSP), Springer, Aug. 2018[PDF]
- Vishal Sharma, Maisagalla Gopal, Pooran Singh, Santosh Kumar Vishvakarma and Shailesh Singh Chouhan, “A Robust, Ultra Low-Power, Data-Dependent-Power-Supplied 11T SRAM Cell with Expanded Read/Write Stabilities for Internet-of-Things Applications,” Analog Integrated Circuits and Signal Processing, Springer, pp 1-16, Aug, 2018.[PDF]
- Pooran Singh and Santosh Kumar Vishvakarma, "Ultra Low Power-High Stability, Positive Feedback Controlled (PFC) 10T SRAM cell for Lookup Table (LUT) Design, "Integration, the VLSI Journal, Elsevier, vol. 62, pp 1-13, June 2018[PDF]
- Vishal Sharma, Maisagalla Gopal, Pooran Singh, and Santosh Kumar Vishvakarma, “A 220 mV Robust Read-Decoupled Partial Feedback Cutting based Low-Leakage 9T SRAM for Internet of Things (IoT) Applications,” International Journal of Electronics and Communications, Elsevier, vol. 87, pp. 144-157, April 2018.[PDF]
- Pooran Singh and Santosh Kumar Vishvakarma, "Ultra-Low Power High Stability 8T SRAM for Application in Object Tracking System", IEEE Access, Vol. 6, pp. 2279 - 2290, 2018.
2017
- Pooran Singh and Santosh Kumar Vishvakarma, “Ultra low power process tolerant 10T (PT10T) SRAM with improved read/write ability for internet of things (IoT) applications," Journal of Low Power Electronics and Applications, vol. 7, no. 3, 24, pp. 1-22, Sept. 2017[PDF]
- Pooran Singh and Santosh Kumar Vishvakarma “Low Complexity-Low Power Object Tracking Using Dynamic Quad-tree Pixelation and Macro-block Resizing,” Pattern Recognition and Image Analysis, Springer, vol 27, issue 4, pp 731-739, Oct 2017.[PDF]
- Pooran Singh, B. S. Reniwal, V. Vijayvargiya, Vishal Sharma and Santosh Kumar Vishvakarma," Dynamic Feedback-Controlled Static Random Access Memory for Low Power Applications", Journal of Low Power Electronics, ASP, Vol. 13, No. 1, pp. 47-59 (13), March 2017, ASP, USA.[PDF]
- Pooran Singh and S. K. Vishvakarma, “Differential dynamic feedback controlled 10T SRAM for ultra-low power applications,” IEEE TC-VLSI Circuit and Systems Letter, vol. 3, no.1, pp. 6-12, Feb. 2017.
- Pooran Singh, B. S. Reniwal, V. Vijayvargiya, V. Sharma and S. K. Vishvakarma, “A 9T SRAM for ultra-low power applications,” 30th IEEE International Conference on VLSI Design and 16th International Conference on Embedded Systems, 7th -11th Jan. 2017, Hyderabad, India.
- Reniwal, Pooran Singh, V. Vijayvargiya and S. K. Vishvakarma, “A new sense amplifier design with improved input referred offset characteristics for energy-efficient SRAM,” 30th IEEE International Conference on VLSI Design and 16th International Conference on Embedded Systems, 7th -11th Jan. 2017, Hyderabad, India.
2016
- Pooran Singh and S. K. Vishvakarma, “Low leakage-high stability differential positive feedback controlled 10T (DPFC10T) SRAM Cell,” Application No. 201621038192 (Filed patent on 8th Nov. 2016).
- Vikas Vijayvargiya, B. S. Reniwal, Pooran Singh, S. K. Vishvakarma, “Analog/RF Performance Attributes of an Underlap Tunnel Field Effect Transistor for Low Power Applications,” IET Electronics Letters, vol. 52, no. 7, pp. 559-560, April 2016.
2015
- S. Reniwal, V. Vijayvargiya, Pooran Singh, S. K. Vishvakarma and D. Dwivedi, “Dataline isolated differential current feed/mode sense amplifier for small Icell SRAM using FinFET,” IEEE 25th Great Lakes Symposium on VLSI (GLSVLSI), 20th-22nd May 2015, Pittsburgh, PA, USA.
- GSR Srivatsava, Pooran Singh, S. Gaggar and S. K. Vishvakarma, “Dynamic power reduction through clock gating technique for low power memory applications,” IEEE Inter. Conf. on Electrical, Computer and Comm. Tech., 5th-7th March 2015, Tamilnadu, India
2014
- Pooran Singh and S. K. Vishvakarma, “Design of high-speed DDR SDRAM controller with less logic utilization,” IEEE Inter. Conf. on Devices, Circuits and Systems 2014, 6th - 8th March 2014, Coimbatore, Tamilnadu, India.
2013
- Pooran Singh and S. K. Vishvakarma, “RTL level implementation of high-speed low power Viterbi encoder-decoder,” IEEE 3rd Inter. Conference on Information Science and Technology (ICIST-2013), Yangzhou, Jiangsu, China, 23rd - 25th March 2013.
- Pooran Singh and S. K. Vishvakarma, “Device/Circuit/Architectural techniques for ultra-low power FPGA design,” J. of Microelectronics and Solid-State Electronics, Scientific and Academic Publishing, USA, vol. 2, no. 1, pp. 1-15, March 2013.
Research Interests:
- Ultra-low power SRAM design and architecture
- High-performance robust memory design for AI and smart devices
- Digital ASIC/SoC design for IoT, AI and smart devices
- Robust VLSI Circuit & System Design
- Low Power Memory Design
- Reliable Memories for Space Applications/IoT applications
- SRAM based In Memory Compute
- VLSI for Signal & Image Processing
- FPGA based System Design
Project Grants
Ongoing (02)
- Project Title: Design of Cost-Efficient SRAM for Low Power Applications
Funding Agency: SERB SURE
PI: Pooran Singh, Estimated Grant: ~20 lakhs - Project Title: Smart Farming Infrastructure
Funding Agency: Mahindra University
PI: Pooran Singh, Estimated Grant: ~6 lakhs
Awards
- 10/2014 – 07/2015 Fulbright-Nehru Doctoral Research Fellowship, USIEF, Georgia Tech, Atlanta, Georgia, USA
- 2014 – 2015 Patel Fellowship, Institute of International Education (IIE), USA
- 01/2010-10/2017 PhD Research Fellowship, MHRD, Govt. of India
- 07/2008-05/2010 GATE (Graduate Aptitude Test in Engineering) Fellowship